1. Field of the Invention
The present invention relates to a wafer scale integrated circuit (hereinafter referred to as a WSI circuit) including a plurality of functional circuit blocks arranged on a wafer. More particularly, it relates to a technique of electrically connecting non-defective functional circuit blocks in the WSI circuit to thereby form a signal propagation path (hereinafter referred to as a spiral). Note, for convenience, each of the functional circuit blocks is hereinafter referred to as a "chip".
2. Description of the Related Art
In a known typical WSI circuit, since a plurality of chips are arranged in the form of a grid on a wafer, the number of chips adjacent to an arbitrary chip is four at maximum. Accordingly, in the process of forming a "spiral", the number of chips capable of being connected to a chip located at the head of the spiral is limited to three at maximum, even if the adjacent chips are all non-defective chips.
When forming the spiral, defective chips present on the wafer cannot be incorporated therein, and accordingly, depending upon the distribution of the defective chips, it becomes necessary to form a branch signal path which turns away from the original signal propagation path (spiral).
Where a number of branch signal paths are present on the wafer, however, a drawback arises in that it is cumbersome and difficult to control chips on the branch signal path, and accordingly, the control of the spiral forming becomes complicated. This leads to a prolongation of the processing time for the spiral forming. Also, since the number of adjacent chips is limited to four at maximum, the efficiency of the utilization of non-defective chips becomes relatively lower, depending upon the distribution of the non-defective chips,
Note, the problems in the prior art will be explained in detail later, in contrast with the preferred embodiments of the present invention.